PCB Type

Rigid = T13-7, standard FR4 multilayer, 0 to 500V. Flex = T13-8, polyimide-based flex PCB or the flex section of a rigid-flex, 0 to 150V (above 150V: ECSS-E-ST-20). Sculptured Flex = T13-9, single-layer flex with trapezoidal copper section (§8.7), 0 to 150V, only XY internal clearance is specified (no Z, no external, no holes).

Rigid Flex Sculptured Flex

Voltage ΔV

Enter the worst-case peak transient voltage between the two conductors (§13.8.2b). This is not the nominal working voltage or RMS. Include transients, surge, and failure-mode voltage if required by the project. If one net is GND (0V), enter the peak voltage of the other net. Range depends on PCB type: rigid 0 to 500V, flex and sculptured flex 0 to 150V. Above the upper bound requires specific qualification (§13.8.2l) or ECSS-E-ST-20 for flex.

Worst-case peak transient voltage (§13.8.2b)

Copper Thickness

Base copper thickness in µm before plating. Common values: 9, 12, 17, 35, 70 µm. This determines the manufacturing tolerance column in T13-7 or T13-8: thicker copper means larger etching tolerance, which means larger as-designed clearance. Fine pitch requires Cu ≤17µm without plating steps (§7.4.5g). Plated layers add ≥25µm on top of this value.

µm. Base copper (before plating)

Initial Cu Thickness

Sculptured flex uses a thick initial copper foil that is etched down to form trapezoidal conductors of varying height (§8.7). Only two categories are specified in T13-9. Thin 250µm: X,Y tolerance 100 µm (T8-2). Thick 300µm: X,Y tolerance 130 µm. The higher tolerance on thick reflects the deeper etch profile.

Thin 250 µm Thick 300 µm

Pitch

Normal = standard track and pad spacing. Fine = denser spacing, used only for impedance-controlled routing or signal routing to AAD (§7.4.5c). Fine pitch on internal layers is limited to ≤30V (§7.4.5d), requires Cu ≤17µm without plating (§7.4.5g), and must be recorded as Review Item (§7.4.5b). Fine pitch is incompatible with reliable insulation (§13.9.3.1 NOTE 9). On flex, fine pitch on external terminations is not permitted (T13-8).

Normal Fine

Conformal Coating

Whether the external layer has conformal coating, potting, or encapsulation (§13.8.4g). Mandatory for: fine pitch external (§13.8.4b), any voltage >30V on external layers of rigid PCB (§13.8.4c, Paschen discharge risk at launch), reliable insulation on external layers (§13.9.3.2a). On flex terminations T13-8 tabulates explicit uncoated values up to 150V for normal pitch. Selecting "Without" above 30V on rigid returns NOT PERMITTED, except for connector pad footprints where coating cannot penetrate between pins (§13.8.4d).

With coating Without

Insulation Class

Standard = minimum clearance for all net pairs (T13-3 rigid, T13-4 flex). Reliable §13.9 = increased clearance for critical nets (§13.9.2a): unprotected main bus power, Single Point Failure nets, nets whose insulation loss would propagate failure to another critical net, cross-strapped functions. Reliable is determined by the functional role of the net, not by its voltage. A 5V SPF net requires reliable insulation, a 400V non-critical net does not. FAI (First Article Inspection) is mandatory when reliable insulation is applied (§13.9.2d).

Standard Reliable §13.9

Reliable Method (Z direction)

Three alternative methods for Z-direction reliable insulation (§13.9.3.1a). Method 1: increase Z thickness to T13-5 values. Simplest but makes the PCB thicker. Method 2: keep standard Z but interpose two individually cured insulators (prepreg + laminate/flex with copper on one side only); requires PID qualification (§13.9.3.1 NOTE 8). Method 3: keep standard Z but offset conductors in XY so they do not overlap vertically. Most reliable (NOTE 7). Method 3 is mandatory on microvia layers (§13.9.3.1b). XY clearances (Cases 2 to 5) are the same regardless of method chosen (§13.9.3.1c). On flex, the Z clearance formula is fixed by T13-8 and the three-method selection does not alter its value.

Method 1 Method 2 Method 3

M1: increase Z · M2: two insulators (PID) · M3: offset XY

Bond Sequence

Affects only Case 5 (hole-to-hole). Determines the registration tolerance added to as-designed values (§13.8.2i NOTE). Single = one lamination cycle, ±100µm tolerance. Standard rigid PCBs. Sequential = multiple lamination cycles (build-up, HDI), ±300µm. Rigid-flex = also ±300µm. The bond sequence is determined by the PCB manufacturer at the time of drilling (§13.10d), not by the designer, but the designer must know the build-up to select correctly. On flex, hole-to-hole clearance is not tabulated separately in T13-8; T13-7 Part 4 values are applied.

Single Sequential Rigid-flex

HDI Technology

None = standard PCB, no HDI exceptions apply. Microvia layer §11.4.1 = layers containing microvias (blind vias <250µm, laser-drilled). Z min reduced to 60µm (§11.4.1h); above 30V superimposed conductors are not permitted (§11.4.1j). Polyimide HDI §11.6a = complete HDI technology per Table 11-1 (1.0mm pitch AAD). Clearance reduced to 63/70µm for 0 to 10V fine pitch. Max 2 microvia layers per side, staggered. Reduced pad §7.5.3l = internal pad diameter reduced with annular ring ≥25µm (instead of 50µm). Requires teardrop reinforcement, wicking conformance, electrical registration coupon, and Review Item. All HDI options are Review Items in the PCB definition dossier. HDI options apply to rigid PCBs only.

ECSS PCB Insulation Clearance Calculator

Input Parameters